1. Field of the Invention
The present invention relates to trench isolation structures in semiconductors and, more particularly, to trench isolation structures having oxide materials deposited within a trench.
2. Description of the Related Art
Trench isolation structures are used to isolate transistors and logic gates in high density semiconductor devices such as microprocessors, non-volatile memories, and programmable logic arrays. FIGS. 1A-1C are diagrams summarizing the formation of a conventional trench isolation structure 10 by etching a trench opening 12 into the semiconductor substrate 5 having on the substrate surface an oxide layer 7 and a silicon nitride layer 9. As shown in FIG. 1A, the trench opening 12 has sidewalls 12a and 12b and a width of approximately 0.5 micron. The conventional process then uses low pressure chemical vapor deposition (LPCVD) to deposit an oxide such as tetraethylorthosilicate (TEOS) to fill the trenches, typically by depositing a layer of oxide having a thickness of greater than half the trench width on each wall of the trench. Specifically, if the trench 12 has a width of 0.5 micron and the oxide layer 14 had a thickness of less than 0.25 micron, the deposited oxide layer 14a would form a structure having a gap 15 as shown in FIG. 1B. To avoid formation of the gap, the deposited oxide layer 14 typically has a thickness of greater than one half the trench width to form the structure in FIG. 1C.
As shown in FIG. 1C, however, a seam 16 tends to form in the trench isolation structure at the boundary where the two oxide portions 14a and 14b of the oxide layer 14 meet. Although the actual location of the seam 16 may vary depending on the relative thicknesses of the deposited oxide layer 14a and 14b, the seam 16 will form where the layers 14a and 14b meet.
Formation of the seam creates problems that will reduce the yield of the semiconductor device. For example, the seam 16 may open during manufacture, such as during planarization that involves etch-back or chemical-mechanical-polishing (CMP) processing of the oxide layer 14. Etch-back of the deposited oxide layer 14 causes the upper end of the seam 16 to open at a faster rate, resulting in a "V" formation that can collect materials deposited during fabrication. Accelerated etching of the seam 16 may also create electrically conductive stringers formed from subsequently deposited materials such as polysilicon, metal or silicide. These stringers cannot be removed because the deposited material is embedded in the "V" formation. Thus, the stringers can cause shorts between poly and metal lines and therefore reduce the product yield.